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Freescale Semiconductor Addendum
Document Number: MC9S08GB60AD Rev. 1.0, 04/2006
Addendum to MC9S08GB60, MC9S08GB32, MC9S08GT60, MC9S08GT32, MC9S08GT16 Data Sheet
This addendum provides the following changes to the MC9S08GB60, MC9S08GB32, MC9S08GT60, MC9S08GT32, and MC9S08GT16 Data Sheet (Freescale Semiconductor order number MC9S08GB60/D): * Relace Table A-4 DC Characteristics with the new table found on page 2 of this Addendum * Replace the MC9S08GTxx Block Diagram with the diagram found on the page 3 of this Addendum.
(c) Freescale Semiconductor, Inc., 2006. All rights reserved.
Table A-4 DC Characteristics (Temperature Range = -40 to 85C Ambient)
Parameter Low-voltage detection threshold -- high range (VDD falling) (VDD rising) Low-voltage detection threshold -- low range (VDD falling) (VDD rising) Low-voltage warning threshold -- high range (VDD falling) (VDD rising) Low-voltage warning threshold -- low range (VDD falling) (VDD rising)
1
Symbol VLVDH
Min
Typical1
Max
Unit V
2.08 2.16 VLVDL 1.80 1.88 VLVWH 2.35 2.35 VLVWL 2.08 2.16
2.1 2.19 1.82 1.90 2.40 2.40 2.1 2.19
2.2 2.27 V 1.91 1.99 V 2.5 -- V 2.2 2.27
Typicals are measured at 25C.
Addendum to MC9S08GB60, MC9S08GB32, MC9S08GT60, MC9S08GT32, MC9S08GT16 Data Sheet, Rev. 1.0 2 Freescale Semiconductor
HCS08 CORE
INTERNAL BUS 8
PORT A
BDC
CPU
DEBUG MODULE (DBG)
PTA7/KBI1P7- PTA0/KBI1P0
NOTES 1, 7
RESET NOTE 4 IRQ NOTES 2, 3
RESETS AND INTERRUPTS MODES OF OPERATION POWER MANAGEMENT RTI IRQ COP
8-BIT KEYBOARD INTERRUPT MODULE (KBI1)
PORT B
HCS08 SYSTEM CONTROL
8
PTB7/AD1P7- PTB0/AD1P0
NOTE 1
IIC MODULE (IIC1) PORT C
LVD SERIAL COMMUNICATIONS INTERFACE MODULE (SCI1)
USER FLASH (GT60 = 61,268 BYTES) (GT32 = 32,768 BYTES) (GT16 = 16,384 BYTES)
PTC7 (NOTE 9) PTC6 (NOTE 10) PTC5 (NOTE 10) PTC4 PTC3/SCL1 PTC2/SDA1 PTC1/RxD2 PTC0/TxD2 PTD4/TPM2CH1 PTD3/TPM2CH0
NOTES 1, 5
PORT D
SERIAL COMMUNICATIONS INTERFACE MODULE (SCI2)
PTD2/TPM1CH2 (NOTE 9) PTD1/TPM1CH1 PTD0/TPM1CH0 PTE5/SPSCK1
NOTE 1
USER RAM (GT60 = 4096 BYTES) (GT32 = 2048 BYTES) (GT16 = 1024 BYTES) VDDAD VSSAD VREFH VREFL
3-CHANNEL TIMER/PWM MODULE (TPM1) (NOTE 8) 5-CHANNEL TIMER/PWM MODULE (TPM2) (NOTE 8)
10-BIT ANALOG-TO-DIGITAL CONVERTER (ATD1)
PORT E
PTE4/MOSI1 PTE3/MISO1 PTE2/SS1 PTE1/RxD1 PTE0/TxD1 PTG3 (NOTE 9)
NOTE 1
INTERNAL CLOCK GENERATOR (ICG) LOW-POWER OSCILLATOR VDD VSS (NOTE 11) VSS1 (NOTE 9) VSS2 (NOTE 9)
SERIAL PERIPHERAL INTERFACE MODULE (SPI1)
PORT G
PTG2/EXTAL NOTE 1 PTG1/XTAL PTG0/BKGD/MS
VOLTAGE REGULATOR
NOTES: 1. Port pins are software configurable with pullup device if input port. 2. Pin contains software configurable pullup/pulldown device if IRQ enabled (IRQPE = 1). 3. IRQ does not have a clamp diode to VDD. IRQ should not be driven above VDD. 4. Pin contains integrated pullup device. 5. High current drive 6. PTC[6:5] are not available on the 42-pin SDIP package. 7. Pins PTA[7:4] contain both pullup and pulldown devices. Pulldown available when KBI enabled (KBIPn = 1). 8. Only two timer channels per TPM are bonded out. All channels are available for use as software compare. 9. PTC7, PTD2/TPM1CH2, PTG3, VSS1, and VSS2 are not available on the 44 QFP or 42 SDIP. 10. PTC[6:5] not available on the 42 SDIP. 11. VSS is not available on the 48 QFP.
Figure 1-2. MC9S08GTxx Block Diagram
Addendum to MC9S08GB60, MC9S08GB32, MC9S08GT60, MC9S08GT32, MC9S08GT16 Data Sheet, Rev. 1.0 Freescale Semiconductor 3
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